ECE 111

Acronym

• SOC: System on Chip

  WHY SOC?

  • SOC is a system that integrates all components of a computer or other electronic system into a single chip.
  • Benefits of SOC:
    • Reduced size and weight
    • Lower power consumption
    • Improved performance
    • Cost-effective solution for mass production

• ASIC: Application Specific Integrated Circuit

• FPGA: Field Programmable Gate Array

  FPGA vs ASIC

  • FPGA is a type of integrated circuit that can be configured by the user after manufacturing, while ASIC is a custom-designed chip for a specific application.
  • FPGAs are more flexible and can be reprogrammed, while ASICs are more efficient for high-volume production.

• HDL: Hardware Description Language

• HVL： Hardware Verification Language
• VHDL: VHSIC Hardware Description Language

• Verilog: A hardware description language used to model electronic systems.

  VHDL vs Verilog

  • VHDL is a strongly typed language, while Verilog is a weakly typed language.
  • VHDL is more verbose and has a steeper learning curve, while Verilog is more concise and easier to learn.
  • VHDL is more suitable for large and complex designs, while Verilog is more suitable for smaller designs.
  • VHDL does not support advanced OOP based verification, while Verilog does

• systemVerilog : A hardware description and verification language that extends Verilog with features for design and verification.

• netlist: A directed graph where vertices indicates components and edges indicate interconnections

  • if vertices are gates, called, gate level netlist
  • if vertices are transistors, called, transistor level netlist

• simulation: perform functional simulation using simulator

• synthesis: convert HDL to netlist (gate level netlist)